1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device, wherein a through hole formed at a predetermined portion in a semiconductor substrate is buried with a conductive material by selectively growing a high-melting point metal such as tungsten on a specific conductive material exposed on the bottom of the through hole by utilizing a selective CVD (chemical vapor deposition) method.
2. Description of the Related Art
With a recent trend of increased density of a semiconductor integrated circuit, a contact hole to be formed in the insulating layer on a semiconductor substrate becomes high in aspect ratio. As a result, a technique of burying a contact hole with a conductive material is now being adopted in an attempt to keep the surface of an insulating as flat as possible and to assure the reliability of a wiring layer to be formed on the insulating layer.
As a means to bury a contact hole (through hole), there have been known a blanket method and a selective CVD method.
According to the blanket method, a conductive material such as tungsten is deposited all over the surface of an insulating layer including the interior of a through hole formed in an insulating layer on a semiconductor substrate, and then the whole surface of the deposited layer is etched back so as to ultimately leave tungsten only in the through hole.
On the other hand, according to the selective CVD method, a high-melting point metal such as tungsten is selectively grown only on a specific conductive material exposed on the bottom of a through hole.
Both of the methods are different in process from each other, and have both advantages and disadvantages.
In the selective CVD method, the characteristics of a high-melting point metal halide that the reduction reaction rate thereof is dependent largely on an underlayer is utilized. For example, in the case of WF6, a tungsten film can be deposited only on a specific material such as Si and W, and can be hardly deposited on an insulating material such as SiO.sub.2. Therefore, this phenomenon is very useful in filling a through hole or via hole with a high-melting point metal.
In this selective CVD method however, it is required in order to achieve a desirable selectivity to the underlayer to determine an optimum condition for effecting a reduction reaction such as hydrogen reduction or silane reduction of WF.sub.6 by adjusting the deposition temperature or flow ratio of a mixed gas.
This selective CVD method however has been found to have the following defects.
It is very difficult to distinguish a film which allows the growth of for example tungsten from a film which does not allow the growth of tungsten among exposed films of conductive materials usually employed for semiconductor devices, such as silicon, a high-melting point metal and a metal silicide.
A reason for this is that the deposition conditions such as deposition temperature and flow ratio of a mixed gas are required to be delicately adjusted, thus setting forth problems of stability and reproducibility in an actual process, and thereby causing tungsten to grow on every exposed surfaces of the conductive materials during the step of the selective growth. As a result, it is not possible under such circumstances to distinguish a film which allows the growth of for example tungsten from a film which does not allow the growth of tungsten.
Therefore, when there are a plurality of through holes different in depth from each other and if tungsten is indiscriminately grown burying the through holes, the shallowest through hole is first filled with tungsten, and then next shallowest through hole is filled with tungsten, and so on. Accordingly, when the growth of tungsten is continued in this manner, tungsten filling the shallowest through hole overflows from the brim of the through hole. Therefore, with this selective growth method, the amount of tungsten to be grown is inevitably restricted according to the depth of the shallowest through hole.
FIG. 1 explains one embodiment of the conventional selective CVD method.
In this selective CVD method, a MOS transistor is formed on a silicon substrate 201, wherein the reference numeral 203 denotes a diffusion layer, 204 a gate insulating film, and 206 a gate electrode (wiring) consisting for example of tungsten silicide-polycide. After depositing an oxide insulating film 218 all over the substrate, predetermined portions of the oxide insulating film 218 for example over the silicon substrate 201, over the diffusion layer 203 or over the gate electrode 206 are perforated to form through holes 210-1,210-3 and 210-6.
The depth of each of the through holes 210-1, 210-3 and 210-6 is dependent upon the material of the underlayer disposed at the bottom of each through hole.
When the conventional selective CVD method is subsequently executed to grow a layer of tungsten 216, the growth of tungsten is obstructed on the oxide insulating film 218, but the growth of tungsten is effected selectively as shown in FIG. 2 on the silicon substrate 201, the diffusion layer 203 and the gate electrode 206 exposed on the bottoms of these through holes.
In this case, since the depth of each of through holes differs according to the material of the underlayer, if the growth of tungsten is effected to match with the depth of the through holes 210-1 and 210-3, tungsten 216 overflows from the brim of the shallow through hole 210-6.
On the other hand, there is another technique different from that explained above in the selective growth of tungsten. According to this technique, as shown in FIG. 3, the growth of tungsten is effected to match with the depth of the shallowest through holes 210-6 so that the deep through holes 210-1 and 210-3 are incompletely filled with tungsten as in the case of a non-volatile memory wherein the shallowest through hole 210-6 is formed over a control gate electrode of a memory cell having a stacked gate structure. FIG. 4 explains another embodiment of structure wherein the oxide insulating film 218 is a 2-ply layer consisting of layers 218-1 and 218-2, and a shallowest through hole 210-62 is formed over a wiring 206-2 formed on the first layer of the oxide insulating film 218-1, so that the depth of the shallowest through hole 210-62 substantially differs from the depths of the through holes 210-1 and 210-3 over the silicon substrate (a diffusion layer).
When the growth volume of tungsten is matched with the depth of the shallowest through hole 210-6 or 210-62 in these two typical embodiments, the contact to a wiring layer at the deep through holes 210-1 and 210-3 may become insufficient, so that the effect of filling the through holes with tungsten would be substantially lost thus raising a problem.
It can be said that the defects as mentioned above are brought about from the technique of discriminately growing tungsten over the whole through holes when there are a plurality of through holes having different depths from each other. However, there has not been known a technique of selectively filling tungsten only in selected one or ones of the through holes.
There is another problem in the above-mentioned technique of the contact-filling when it is applied to the manufacture of semiconductor devices as explained below.
Namely, in the step of forming aluminum wiring layer for obtaining a desired electric contact subsequent to the perforation of a through hole, a pattern of a deep through hole 210-1 is generally utilized as an alignment mark for the patterning of a wiring layer. However, when the deep through hole 210-1 is filled with a conductive material by using the above-mentioned burying technique of realizing an excellent flatness, the step which is formed around the upper portion of the deep through hole 210-1 is now lost thereby causing the detection of the alignment mark (the pattern of the through hole 210-1) difficult, thus increasing the possibility of false detection.
As explained above, it is impossible according to the conventional selective CVD method of filling tungsten in a through hole to make a selection between a through hole to be filled with tungsten and a through hole not to be filled with tungsten among a plurality of through holes having different depths from each other, and to allow tungsten to be filled into only desired one or ones of the through holes.
It is also pointed out as a problem that it is difficult according to the conventional selective CVD growth method to detect an alignment mark consisting of a through hole pattern in the step of forming aluminum wiring layer.